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SN74AHC373PWR
IC OCT TRNSP D-TYP LATCH 20TSSOP
- メーカー
- Mfr。パート #SN74AHC373PWR
- パッケージ 20-TSSOP (0.173, 4.40mm Width)
- データシート SN74AHC373PWR DataSheet
- 在庫中6075
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仕様
| Supplier | Texas Instruments,Rochester Electronics, LLC |
| Package | Tape & Reel (TR),Cut Tape (CT),Bulk |
| Series | 74AHC |
| ProductStatus | Active |
| LogicType | D-Type Transparent Latch |
| Circuit | 8:8 |
| OutputType | Tri-State |
| Voltage-Supply | 2V ~ 5.5V |
| IndependentCircuits | 1 |
| DelayTime-Propagation | 1ns |
| Current-OutputHighLow | 8mA, 8mA |
| OperatingTemperature | -40°C ~ 85°C |
| MountingType | Surface Mount |
| Package/Case | 20-TSSOP (0.173, 4.40mm Width) |
概要
Description
SN74AHC373PWR is TI’s 8-bit octal transparent latch with 3-state outputs (AHC family: high-speed CMOS). It latches D0–D7 under control of the latch-enable (LE) input: when LE is high, D0–D7 pass through to Q0–Q7; when LE goes low, Q0–Q7 hold the last latched values. An output-enable (OE) input tri-states the outputs for bus sharing when asserted. It operates on Vcc from about 2.0 to 5.5 V with low-power CMOS levels. Typical uses include buffering and demultiplexing address/data on microprocessor/microcontroller buses, or as a small register in glue logic. The PWR suffix indicates a specific TI package/pinout option (check the datasheet for exact packaging such as DIP, SOIC, etc.). Typical pins: D0–D7, LE, OE, Q0–Q7, Vcc, GND. For exact timing, propagation delays, current limits, and package options, refer to the SN74AHC373PWR datasheet.
Features
Here are the key features of SN74AHC373PWR:
- 8-bit D-type transparent latch with 3-state outputs
- Level-sensitive latch (D inputs follow Q when latch enable is active; holds when inactive)
- Separate output enable (OE) for high-impedance bus sharing
- Wide operating voltage: typical 2.0 V to 5.5 V (AHC family)
- High-speed CMOS with low static and dynamic power
- Outputs are tri-statable, suitable for bus driving
- 8-bit data bus buffering and storage
- Packaging option with Power/PowerPad variant (PWR suffix) for power delivery
Note: Please consult the exact datasheet for pinout, input thresholds, and package details for your specific variant.
- 8-bit D-type transparent latch with 3-state outputs
- Level-sensitive latch (D inputs follow Q when latch enable is active; holds when inactive)
- Separate output enable (OE) for high-impedance bus sharing
- Wide operating voltage: typical 2.0 V to 5.5 V (AHC family)
- High-speed CMOS with low static and dynamic power
- Outputs are tri-statable, suitable for bus driving
- 8-bit data bus buffering and storage
- Packaging option with Power/PowerPad variant (PWR suffix) for power delivery
Note: Please consult the exact datasheet for pinout, input thresholds, and package details for your specific variant.
Package
The SN74AHC373PWR is packaged in a 20-pin TSSOP (Thin Shrink Small Outline Package), surface-mount, supplied in tape-and-reel (PWR) format.
Pinout
Pin count: 20 pins.
Function: An 8-bit transparent latch with 3-state outputs. It has D0–D7 data inputs, Q0–Q7 outputs, LE (Latch Enable) to latch D to Q, and G (Output Enable, active low) to tri-state the outputs. Vcc and GND pins are included.
Function: An 8-bit transparent latch with 3-state outputs. It has D0–D7 data inputs, Q0–Q7 outputs, LE (Latch Enable) to latch D to Q, and G (Output Enable, active low) to tri-state the outputs. Vcc and GND pins are included.
Manufacturer
- Manufacturer: Texas Instruments (TI).
- What kind of company: TI is a global American semiconductor company that designs and manufactures analog, mixed-signal, and digital integrated circuits and related electronics components. It is headquartered in Dallas, Texas, and is one of the largest IC producers worldwide.
- What kind of company: TI is a global American semiconductor company that designs and manufactures analog, mixed-signal, and digital integrated circuits and related electronics components. It is headquartered in Dallas, Texas, and is one of the largest IC producers worldwide.
Application
Application areas of SN74AHC373PWR:
- Latching multiplexed address/data buses in microprocessor/memory interfaces (demultiplexing addresses)
- 8-bit data buffering/temporary storage between logic blocks
- Bus interfacing and tri-state bus sharing in digital systems and peripheral interfaces
- High-speed data capture for display drivers, registers, and data paths
- General-purpose 8-bit latch in ASIC/FPGA-based designs and rapid prototyping
- Any application needing a fast, low-power 8-bit latch with tri-state outputs
- Latching multiplexed address/data buses in microprocessor/memory interfaces (demultiplexing addresses)
- 8-bit data buffering/temporary storage between logic blocks
- Bus interfacing and tri-state bus sharing in digital systems and peripheral interfaces
- High-speed data capture for display drivers, registers, and data paths
- General-purpose 8-bit latch in ASIC/FPGA-based designs and rapid prototyping
- Any application needing a fast, low-power 8-bit latch with tri-state outputs
Equivalent
Equivalents (same function: octal transparent latch with 3-state outputs) from other vendors:
- 74HC373, 74HCT373
- 74ACT373
- 74LVC373 (and related LVC/LVX variants)
Note: Substitution depends on voltage range and input thresholds. Check datasheets for Vcc, VOH/ VOL, and 3-state enable before swapping.
- 74HC373, 74HCT373
- 74ACT373
- 74LVC373 (and related LVC/LVX variants)
Note: Substitution depends on voltage range and input thresholds. Check datasheets for Vcc, VOH/ VOL, and 3-state enable before swapping.
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