画像は参照用のみです。
EP1K100FI256-2
IC FPGA 186 I/O 256FBGA
- メーカー
- Mfr。パート #EP1K100FI256-2
- パッケージ 256-BGA
- データシート
- 在庫中2505
100% オリジナル &新しい
出荷の準備ができている24時間
365日の保証
RFQおよびもっと割引を得る
仕様
| Supplier | Intel |
| Package | Tray |
| Series | ACEX-1K® |
| ProductStatus | Obsolete |
| NumberofLABs/CLBs | 624 |
| NumberofLogicElements/Cells | 4992 |
| TotalRAMBits | 49152 |
| NumberofI/O | 186 |
| NumberofGates | 257000 |
| Voltage-Supply | 2.375V ~ 2.625V |
| MountingType | Surface Mount |
| OperatingTemperature | -40°C ~ 85°C (TA) |
| Package/Case | 256-BGA |
概要
Description
EP1K100FI256-2 is an Altera (now Intel) APEX 1K FPGA device. It comes in a 256‑pin package (FI256) and uses the -2 speed grade. The device provides roughly 1K logic elements (ALUT-based cells) with distributed RAM and I/O blocks for small-to-moderate digital logic designs. It’s programmed with Altera’s Quartus tools (often via JTAG or vendor programmers). Note: this is an old, legacy FPGA family; for exact resource counts, RAM, I/O quantities, and timing, refer to the specific datasheet for EP1K100FI256-2.
Features
I don’t have the exact datasheet for EP1K100FI256-2. This part name suggests a legacy EP1K series FPGA/PLD with:
- around 100K logic-element-equivalents
- a 256-pin package (FI256)
- speed grade -2
- multiple I/O banks with configurable I/O standards
- embedded RAM blocks and LUT-based logic
- flip-flops, clock management (PLL/DCM), and JTAG/boundary-scan
- programmable configuration options (serial/parallel)
For precise, vendor-specific specs (core voltage, I/O counts per bank, RAM size, Fmax, power, temperature grade), please share the vendor/datasheet or a link.
- around 100K logic-element-equivalents
- a 256-pin package (FI256)
- speed grade -2
- multiple I/O banks with configurable I/O standards
- embedded RAM blocks and LUT-based logic
- flip-flops, clock management (PLL/DCM), and JTAG/boundary-scan
- programmable configuration options (serial/parallel)
For precise, vendor-specific specs (core voltage, I/O counts per bank, RAM size, Fmax, power, temperature grade), please share the vendor/datasheet or a link.
Package
PQFP-256 (Plastic Quad Flat Pack, 256 pins).
Pinout
- Pin count: 256 pins
- Function: Altera/Intel EP1K100F family EPLD (field-programmable logic device) with about 100K equivalent gates, used to implement user-defined combinational and sequential logic with programmable I/O.
- Function: Altera/Intel EP1K100F family EPLD (field-programmable logic device) with about 100K equivalent gates, used to implement user-defined combinational and sequential logic with programmable I/O.
Manufacturer
- Manufacturer: Lattice Semiconductor Corporation.
- What kind of company: A fabless semiconductor company that designs and markets programmable logic devices (PLDs), including FPGAs and CPLDs, for digital logic and embedded applications.
- What kind of company: A fabless semiconductor company that designs and markets programmable logic devices (PLDs), including FPGAs and CPLDs, for digital logic and embedded applications.
Application
- Glue logic and peripheral interfacing for microprocessors/microcontrollers
- Address decoding, state machines, and custom control logic
- Bus interfacing and timing/control for memory, I/O, and peripherals
- Protocol/interface logic for embedded, telecom, and automation systems
- Data routing and lightweight DSP/pre-processing
- Prototyping and low-volume products in consumer, automotive, industrial, and instrumentation applications
- Address decoding, state machines, and custom control logic
- Bus interfacing and timing/control for memory, I/O, and peripherals
- Protocol/interface logic for embedded, telecom, and automation systems
- Data routing and lightweight DSP/pre-processing
- Prototyping and low-volume products in consumer, automotive, industrial, and instrumentation applications
Equivalent
EP1K100FI256-2 is an Altera EPLD/CPLD (≈100K logic elements) in a 256-pin package, speed grade -2. Exact equivalents require matching resources, I/O banks, and package. Use Intel/Altera’s cross-reference guides or databases. Likely similar devices from other vendors include Xilinx CPLDs (older 9500/CoolRunner families), Lattice ispMACH/ispLEVER, and Actel Fusion/FPGAs; however, no direct drop-in without confirming I/O and timing. Please specify target vendor and resource requirements for precise part numbers.
出荷
出荷方法私たち
DHL、FedEx、TNT、UPS、またはあなたの選択の他の運送業者を通じてグローバルな出荷サービスを提供します。
出荷料参照(DHL/FedEx):
DHL の: 配送費は25ドル〜45ドル(0.5kg)の範囲で、推定配送時間は2〜5営業日です。
フェデックス: 配送費は25ドル〜40ドル(0.5kg)の範囲で、推定配送時間は3〜7営業日。
UPS の: 配送費は25ドル〜45ドル(0.5kg)の範囲で、推定配送時間は3〜7営業日。
TNT社: 配送費は25ドル〜65ドル(0.5kg)の範囲で、推定配送時間は3〜7営業日。
EMS: 配送料金は30〜50ドル(0.5kg)の範囲で、推定配送時間は7〜15営業日です。
登録航空郵便: 配送費は2〜4ドル(0.1kg)で、推定配送時間は5〜20営業日です。
支払い
Payment Methods
支払い期間は100%前払いです。
現在、下記の支払い方法のみを受け入れています。:
1. ペイパル
2. クレジット・デビットカード
3. ワイヤー 転送
類似
-
MX25V1635FZNI
Macronix
-
MX66U1G45GXDI00
Macronix
-
MX25V5126FM1I
Macronix
-
MX25V16066M1I02
Macronix
-
MX25L8035EM2I-10G
Macronix
-
MX25L25673GMI-10G
Macronix
-
MX25L2006EM1I-12G
Macronix
-
MX25R1635FZUIH0
Macronix
-
MX25V1635FM2I
Macronix
-
MX25L12833FM2I-10..
Macronix
-
MX25L12833FZ2I-10..
Macronix
-
MX29LV640ETTI-70G
Macronix